This note covers the following topics: DAC
using binary-weighted resistors , R-2R ladder network, Thevenin resistance, R-2R
ladder network: VTh for S0 = 1 , R-2R ladder network: VTh for S1 = 1, R-2R
ladder network: RTh and VTh, DAC with R-2R ladder , DAC: settling time , 3-bit
parallel (flash) ADC , Parallel (flash) ADC , ADC: sampling of input signal,
Successive Approximation ADC, Counting ADC, Tracking ADC and Dual-slope ADC.
Author(s): M. B. Patil
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