This guide reviews the historical development of programmable
logic devices, the fundamental programming technologies that the programmability
is built on, and then describes the basic understandings gleaned from research on architectures. This survey has explored many issues in
the complex and rapidly evolving world of pre-fabricated FPGA architectures.
Topics covered includes: Early History of Programmable Logic, Programming
Technologies, Logic Block Architecture, Routing Architecture, Input/Output
Architecture and Capabilities, Improving FPGAs, Emerging Challenges and
Architectures.
Author(s): Ian Kuon1, Russell Tessier and
Jonathan Rose
The intention of this book is
that, with just a basic understanding of digital electronics, you will be able
to teach yourself to program FPGAs in block diagram mode or using a high-level
descriptive language.
This guide reviews the historical development of programmable
logic devices, the fundamental programming technologies that the programmability
is built on, and then describes the basic understandings gleaned from research on architectures. This survey has explored many issues in
the complex and rapidly evolving world of pre-fabricated FPGA architectures.
Topics covered includes: Early History of Programmable Logic, Programming
Technologies, Logic Block Architecture, Routing Architecture, Input/Output
Architecture and Capabilities, Improving FPGAs, Emerging Challenges and
Architectures.
Author(s): Ian Kuon1, Russell Tessier and
Jonathan Rose
This note
covers the following topics: FPGA architecture, FPGA technologies, Architectures
of different commercial FPGAs, FPGA tools, FPGA implementation flow and software
involved, HDL coding for FPGA.
This note explains
the following topics: Features and Specifications of FPGAs, Basic Programmable
Devices, Features and Specifications of FPGAs, Generic Xilinx FPGA Architecture,
Virtex FPGA family name, Standard cell based IC vs. Custom design IC, Standard
cell based VLSI design flow, Simple diagram of the back-end design flow , Clock
Tree in FPGAs.